PSO-based charge pump chip area minimization
Abstract
In this paper a solution of the well-known silicon area/performance dilemma and an energy harvesting circuit for wireless sensor nodes are presented. A PSO-based integrated circuit area optimization methodology is proposed. The study is performed on a charge pump circuit, using a 0.35μm Si-CMOS process. The PSO sizing strategy has been implemented using a Spice kernel and Matlab environment. The chip size has been reduced from 583μm2 to 179μm2 after the optimization process. Simulation results from the 0.35μm parameters are given. When driving a capacitive load of 50pF, the output-generated voltage is 4V from a 1.3V input voltage. The simulated pumping gain is 3.1.
Keywords
capacitance
capacitive load
Capacitors
charge pump circuit
charge pump circuits
Charge pumps
circuit optimisation
Clocks
elemental semiconductors
energy harvesting
energy harvesting circuit
gain 3.1 dB
Integrated circuit modeling
Matlab environment
minimisation
Optimization
output-generated voltage
particle swarm optimisation
particle swarm optimization
PSO-based charge pump chip area minimization
PSO-based integrated circuit area optimization methodology
PSO sizing strategy
Si
silicon
silicon area/performance dilemma
size 0.35 mum
SPICE
Spice kernel
Threshold voltage
Transistors
voltage 1.3 V
voltage 4 V
wireless sensor node