index - Equipe System on Chip

 

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Mots clés

Virtual Prototyping Security Computer architecture Modelling Model Mutation LDPC codes Integration Analog/Mixed Signal Design Analysis Model-based engineering Formal Verification TTool Execution Trace Analysis UML/SysML System-on-Chip Modélisation Performance Android Model driven engineering Modeling Malware Hardware Model Driven Engineering FPGA Cognitive Radio Immersion Embedded Systems Disaster management Autonomy Formal Methods Model checking Field programmable gate arrays Automata Mutations Verification Autonomous navigation Design GPR Formal verification Dependency Graph Drone Cyber Physical Systems SDR Iterative decoding MBSE HW/SW partitioning Drones Differential power analysis DPA Autonomous vehicles Behavior Baseband Processing Embedded systems Virtual prototyping Remote sensing Hardware/software partitioning Requirements analysis UAV Signal processing URSI Design space exploration 3D perception Design Space Exploration SysML-Sec HW Accelerators Code generation Models Hardware/software co-design UML Model Checking Model development and analysis Model-driven engineering Reliable systems Coprocessors SysML Costs MDE Simulation Multi-View Design DIPLODOCUS System-level design Artificial intelligence CPS Attacks Application specific integrated circuits Model-checking Classification Hardware Architecture Architecture Cryptography Interactive Communications Exploration d'architecture Ingénierie des modèles Timing analysis Safety ProVerif Heterogeneous models Image processing Autonomous systems Formal methods

 

 

Publications avec texte intégral

109

Références bibliographiques

197

Open access

40 %

Collaborations