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Programming and verifying real-time design using logical time

Fabien Siron 1, 2, 3 Dumitru Potop-Butucaru 3 Robert de Simone 3 Damien Chabrol 1 Amira Methni 1
3 KAIROS - Logical Time for Formal Embedded System Design
CRISAM - Inria Sophia Antipolis - Méditerranée , Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : The design of embedded control software calls for stringent real-time constraints. For that, formalisms and theories based on the notion of logical time give abstraction of real-time durations that are usually not known at design level. Comparison between synchronous languages, Logical Execution Time (LET) and the PsyC language can be fruitful, in our case, with the goal of empowering the industrial language PsyC, which is close to LET, with (logical) time and functional verification methods inspired from synchronous languages.
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Submitted on : Friday, January 21, 2022 - 4:35:48 PM
Last modification on : Friday, February 11, 2022 - 3:02:02 PM
Long-term archiving on: : Friday, April 22, 2022 - 6:47:57 PM


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  • HAL Id : hal-03537976, version 1



Fabien Siron, Dumitru Potop-Butucaru, Robert de Simone, Damien Chabrol, Amira Methni. Programming and verifying real-time design using logical time. FDL 2021 - Forum on specification & Design Languages, Sep 2021, Antibes, France. ⟨hal-03537976⟩



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