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Conference papers
Programming and verifying real-time design using logical time
Abstract : The design of embedded control software calls for stringent real-time constraints. For that, formalisms and theories based on the notion of logical time give abstraction of real-time durations that are usually not known at design level. Comparison between synchronous languages, Logical Execution Time (LET) and the PsyC language can be fruitful, in our case, with the goal of empowering the industrial language PsyC, which is close to LET, with (logical) time and functional verification methods inspired from synchronous languages.
https://hal.inria.fr/hal-03537976
Contributor : Fabien Siron Connect in order to contact the contributor
Submitted on : Friday, January 21, 2022 - 4:35:48 PM
Last modification on : Friday, February 11, 2022 - 3:02:02 PM
Long-term archiving on: : Friday, April 22, 2022 - 6:47:57 PM
Contributor : Fabien Siron Connect in order to contact the contributor
Submitted on : Friday, January 21, 2022 - 4:35:48 PM
Last modification on : Friday, February 11, 2022 - 3:02:02 PM
Long-term archiving on: : Friday, April 22, 2022 - 6:47:57 PM
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FDL21_paper_30.pdf
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